Browsing by Author Madanayake, Arjuna

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Issue DateTitleAuthor(s)Citation
2011Design and FPGA-Implementation of 1 st-Order 4D IIR Frequency-Hyperplanar Digital FiltersDansereau, Donald; Bruton, Len; Madanayake, Arjuna; Wimalagunaratne, Randeel; Australian Centre for Field RoboticsDesign and FPGA-Implementation of 1 st-Order 4D IIR Frequency-Hyperplanar Digital Filters, Proceedings of the 54th IEEE International Midwest Symposium on Circuits and Systems IEEE MWSCAS 2011, vol.N/A, 2011, pp. 1-4
2015Integral form 4-D light field filters using Xilinx FPGAs and 45 nm CMOS technologyDansereau, Donald Gilbert; Bruton, Len; Madanayake, Arjuna; Wijenayake, Chamith; Wimalagunarathne, Randeel; Australian Centre for Field RoboticsIntegral form 4-D light field filters using Xilinx FPGAs and 45 nm CMOS technology, Multidimensional Systems and Signal Processing, vol.26, 1, 2015,pp 47-65
2013Multidimensional (MD) circuits and systems for emerging applications including cognitive radio, radio astronomy, robot vision and imagingDansereau, Donald Gilbert; Williams, Stefan; Bruton, Len; Gunaratne, Thushara; Madanayake, Arjuna; Wijenayake, Chamith; Australian Centre for Field Robotics; Australian Centre for Field RoboticsMultidimensional (MD) circuits and systems for emerging applications including cognitive radio, radio astronomy, robot vision and imaging, IEEE Circuits and Systems Magazine, vol.13, 1, 2013,pp 10-43
2012A Systolic-Array Architecture for First-Order 4-D IIR Frequency-Planar Digital FiltersDansereau, Donald Gilbert; Bruton, Len; Madanayake, Arjuna; Wimalagunarathne, Randeel; Australian Centre for Field RoboticsA Systolic-Array Architecture for First-Order 4-D IIR Frequency-Planar Digital Filters, Proceedings of 2012 IEEE International Symposium on Circuits and Systems, vol.N/A, 2012, pp. 3069-3072
2015VLSI architecture for 4-D depth filteringDansereau, Donald Gilbert; Bruton, Len; Cintra, Renato; Madanayake, Arjuna; Wimalagunarathne, Randeel; Australian Centre for Field RoboticsVLSI architecture for 4-D depth filtering, Signal, Image and Video Processing, vol.9, 4, 2015,pp 809-818